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Abstract

The aim of this project is to completely rewrite two legacy etherboot drivers present in iPXE: for VIA Rhine (VT6105M) and VIA Velocity (VT6122/VT6130) chipsets.

Deliverables

Deliverable Week Current status
Investigate iPXE drivers API and PCI API 1 in progress
Write skeleton for new VIA Rhine driver: probe and attach card, read EEPROM, communicate with MII PHY 2, 3 in progress
Write send and receive (polling) support for VIA Rhine 4, 5 not done
Do functional and performance tests on driver 6 not done
Write skeleton for VIA Velocity driver: probe, attach, read EEPROM and PHY 7, 8 not done
Write send and receive support for VIA Velocity 9, 10 not done
Do functional and performance tests on driver 11 not done
Review the code and do final cleanup 12 not done
Commit code and write documentation 13 not done

Daily progress

  1. 2012.05.20: Write skeleton for VIA Rhine driver based on skeleton.[ch]. Chip reset, MII read/write and reading MAC address from chip is working.
  2. 2012.05.22: Code style cleanup, introduce rhine_reload_eeprom() function to reload EEPROM contents. Working on link status notifications.

Test plan

  1. Functional tests: transferring images, link state and speed changes
  2. Performance tests: transfer speed

Useful links

gsoc/via.1337697263.txt.gz ยท Last modified: 2012/05/22 14:34 by budrys
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